Product teardown reporting is a mechanical decomposition of technology-based devices. In industry, product teardown is generally used to understand how the product works and guide enterprises toward more streamlined solutions.

For assembled products, our team is well equipped with resources and facilities to tear down the completed product and list component code/marking and manufacturer of each component, along with a high-resolution photograph of the dismantling procedure to show the component’s location and associated electrical connections. We provide intelligence to phones, tablets, laptops, wearables, smart home devices, electrical appliances etc. This helps in-

• Identifying the underlying component thus opens the door for an in-depth review of product features given patented technology.
• Identifying the manufacturer of each component and thus expanding the list of potential infringers.
• Identifying details of contributory components involved in infringement thus helps in damage calculation.
• Estimating the bill of materials.

A typical Product Teardown involves following steps-

• Dismantling a product
• Carefully listing IC and other system components
• Capturing high-resolution images of components and electrical connections

To download a sample tear down report click here.

Sometimes simple teardowns of products aren’t good enough to explain the workings of a product. Recent development in the massive integration of billions of devices and features in nanoscaled layered components has forced RE to evolve into a specialised niche to support patent licensing activities.

RE plays a crucial role for new entrants in the market/technology space by letting them know what the competitor is doing. Upon reviewing the parts list in manufacturing a product, one can figure out challenging/problematic areas and align research to develop the best possible solution for the challenge/problem.

Our offshore capability to confirm the unauthorised use of complex processes/methods disclosed in semiconductor patents using the cross-sectional analysis/ structural analysis/reverse engineering of the product in question is the last step to generating foolproof evidence of use. Reverse Engineering dramatically helps in understanding the intricacies of a semiconductor by analysing underlying –

• Process– Analyzing the process means de-layering an IC component to understand how the chip was made and what are they made of.
  Process analysis usually relies on data relating to cross-section/structure, which is collected using SEM (Scanning electron microscopy), TEM (Transmission electron microscopy) and SCM (Scanning Capacitance Microscopy). To understand the chemical composition of underlying layers -dispersive X-ray spectroscopy or secondary ion mass spectrometry is used. These data are then used to reconstruct and understand the layer-by-layer structure of the component.
• Circuit – Circuit extraction is the most complex part of RE studies. It involves package removal followed by de-layering and imaging of the component to understand how the chip works.
  In the semiconductor industry, Circuit Extraction is primarily used for circuit simulation, static timing analysis, signal integrity, power analysis and optimisation, and logic to layout comparison. With devices following Moore’s Law and the introduction of 7nm fabrication technologies, circuit extraction is growing more complex yet exciting and essential to understanding the functioning of multiple modules within a single semiconductor device.

Significant steps involved in Circuit Extraction-

• Package Removal– A variety of acids at various temperatures are used depending on the composition and size of the particular package. These solutions dissolve the packaging material but do not damage the die.
• Device De-layering– It simply means creating a single component sample at each layer and the polysilicon transistor gate level. It accurately strips off each layer, one at a time, while keeping the entire surface planar.
• Imaging & Stitching /Aligning – SEM (Scanning electron microscopy) and TEM (Transmission electron microscopy) are primarily used to take images of IC layers. These images are further stitched/aligned to generate a final appearance for analysis.
• Annotation – Once the data is collated, the actual work of reading back the circuit begins at the annotation stage. The course is redrawn/extracted by taking note of all transistors, capacitors, diodes, and other components, interconnect layers, contacts and vias. Currently, many vendors provide specialised software tools for annotation.
• Analysis – Extracting the circuit from annotated images requires high observation and analytical skills. Experienced analysts carefully analyse sub-circuits to extract courses if visible from the pictures. Analysts use automated extraction software tools for complex systems (digital blocks).